Process-Reliability Relationships in GaN and GaAs Field Effect Transistors and HFETs

Although accelerated life testing of low noise and power GaAs MESFETs under d.c. bias and RF operation has been conducted, some failure mechanisms remain to be of concern. We will address these concerns and will report on failure models of AlGaAs/GaAs HFETs. The set of reliability physics models then will form the starting point for development of physics based failure models for GaN HFETs devices. Processes in effect in GaN, but not in GaAs, owing to higher fields and much larger field, temperature, and strain coupling are included. FAILURE MODES AND MECHANISMS OF AlGaAs/GaAs HFETS The AlGaAs/GaAs HFET degradation mechanisms, beyond those for GaAs MESFETs, include deep levels in the barrier and changes in the 2DEG concentration. The I-V collapse in the dark, and persistent photo-conductivity are more related to the material quality than to the long-term device stability. The decrease in 2DEG density is due to carrier de-confinement, enhanced by field-aided impurity diffusion at the heterointerface (would also occur in GaN HFETs). The defects, present or created by high field (temperature, strain) followed by hot electron capture, would reduce the available carriers. These anomalies also cause high levels of LF noise. Similar effects must undoubtedly take place in the GaN system. Extensive analyses coupled with test heterostructures have been undertaken to uncover the nature of these anomalies for the failure model development. Electromigration plays an important role in GaAs HFETs since GaAs,[1,2] being a binary compound, may have a wide variety of surface conditions (various native oxides and their clusters, surface states etc.). Further, electromigration is influenced by conductor-line material parameters and inhomogeneities, as well as structural features of the conductor layout, etc. GaN FET PHYSICS OF FAILURE/DEGRADATION The degradation mechanisms germane to GaN, in addition to those present in GaAs, are primarily related to surface traps, metal semiconductor and inter-metal diffusion, compound formation, interface and bulk defect states. However, local high fields (>> GaAs) coupled with strain and temperature as well as the increased hot phonon generation will alter the key GaN HFET degradation mechanisms. Clearly, the GaAs model has been a starting point which has been followed with its expansion to incorporate the GaN specific mechanisms. A variety of "trap" related device effects are reported which include transconductance frequency dispersion, current collapse, light sensitivity, gateand drain-lag transients, and restricted microwave power output. The activity directed toward characterizing these effects parallels similar developments in the GaAs-based technology. Electron capture-emission by surface and bulk traps affects the 2DEG density resulting in current collapse, and transconductance dispersion. Because the associated characteristic time is ~ 1ns<τ<1 s, the trapping limits device performance even at relatively low frequencies. In addition, the thermally activated traps contribute significantly to LF noise. Understanding the origin of the traps in GaN-based transistors, their physical and energy location, and the physical mechanisms involved in the trapping is critical for not just the optimization of device performance, but for reliability modeling and reliability optimization for the GaN HFETs. Degradation caused by surface states and preexisting bulk and interface states are reversible. However, when new defects begin to be created and their density cascades due to the combined effects of high field, heat and strain, the resulting device degradation becomes catastrophic. a Bulk buffer traps Bulk traps in early GaN MESFETs and HFETs have been investigated. The fitted photoionization thresholds located the two dominant defects at ~ 1.80 and 2.85 eV below the conduction band edge, and after the 0.55 eV and 0.2 eV Franck-Condon correction, respectively. The DX centers plausibly associated with O have been observed in AlGaN may also be present. The enhancement of the optically induced drain-current recovery for photon energies at or above the band gap, Eg, of GaN has been measured and in 12 391 CS MANTECH Conference, May 13th 16th, 2013, New Orleans, Louisiana, USA contrast, no such increase for photon energies above Eg of AlGaN has been observed, hence, placing the traps to be within GaN buffer layer. However, it is obvious that further investigations are necessary in order to attain a complete understanding. For instance, one trap appears to be correlated with MOCVD growth pressure since the trap density increases at lower pressures [3,4]. b. Surface traps A strong correlation of gate lag with the surface treatment suggests that at least some trapping centers, besides the bulk GaN and AlGaN traps, are located at or near the surface. Surface trapping can be identified by measuring gate lag for devices with different surfaces achieved by chemical treatment or dielectric passivation. The temporal character of charge emission from these traps is typically a stretched exponent with a characteristic time in the range of seconds. Kelvin probe microscopy showed that electrons migrate 0.5– 1 μm along the surface away from the gate. An area of particular concern is the limiting effect of electronic traps on RF performance. Electrostatic force and Kelvin probe microscopes can measure both local surface charge and potential with high spatial resolution. Traps form quasi-static charge distributions, most notably on the wafer surface or in the buffer layers underlying the active channel, act to restrict the drain-current and voltage excursions. c. Interface defects: Heterojunction quality including the effect of AlN interface layer The barrier/buffer interface is critical for device reliability. Imperfections in as grown material and those created during high field/temperature stresses can in fact be the source of the increased channel resistance. The wavefunction overlap with the barrier makes transport susceptible to the quality of the barrier and thus the defects. Hot carrier injection into the barrier will result in damage and will reduce the available channel conductance locally, leading to local heating and when combined with high fields to enhanced defect generation. To combat electron injection and the resulting anomalies, an AlN interfacial layer is introduced. Indeed the mobility measurements confirm the expected improvement. However, under RF stress nearly 3⁄4 of devices having AlN interface layer as opposed nearly 1/3 of those without it showed degradation [3,4]. The bulk and interface defects that are generated due to the coupled forces of electric field, temperature and strain and which play a dominant role in device degradation have not been studied in detail and require further investigations.